1. Field of the Invention
The present invention relates to a semiconductor memory capable of writing information electrically and optically, which is strongly required in the field of data processing and exchanging.
2. Description of the Related Art
In the field of the data processing technology such as a computer system and data communication, information recording and storing technologies occupy the most important position therein. A recent remarkable success, realizing a higher grade and a higher speed in the information processing technology is achieved greatly by the developments in various data storage technologies, where the data storage technologies are progressing to have a higher speed and a greater capacity.
Among those, semiconductor memories including DRAMs are progressing remarkably, and start to enter an era of gigabit memories. The DRAM increases extremely its integration density by migrating from an initial structure which includes a plural of transistors in one cell to a structure which consists of one transistor per one cell. In the gigabit memory era, however, a capacitance of storage capacitor is not sufficient even though adapting a trench structure and a stacked structure. Various approaches such as the use of a high dielectric constant material as capacitor insulated layers are attempted, but leaving the problems which are insoluble technically up to now. Such conventional DRAMs with the trench or stacked structure as well as DRAMs employing the high dielectric constant material for storage capacitor may require complicated fabrication processes and expensive manufacturing equipments. A cost from some ten billions to over than one trillion Japanese Yens is estimated to be necessary for realizing a manufacturing line which can perform a mass production of semiconductor memories with an improved integration density. Moreover, as the conventional DRAM is designed essentially on the basis of a plane (two-dimensional) layout, it is now unable to perform a further miniaturizing by means of a lithography technology. Thus, a technical barrier appears on the conventional semiconductor memory technologies, which mainly focus on the DRAM, and a break through against this technical barrier is required.
An optical computer has been proposed for many years, but has not been very important so far because the conventional silicon (Si) based semiconductor integrated circuit can operate with a higher speed than that is expected. However, as the problem of propagation delay on interconnections becomes significant, causing fatal drawbacks in the semiconductor integrated circuit with the higher integration density, the optical computer is now spotlighted again. The known semiconductor memory including such as DRAMs has no function for writing information directly with an optical input. From this point, a new plan is also required for the semiconductor memory.
An electronic or optical device (memory) which has a structure of n-i-p-i-n or p-i-n-i-p is proposed as a means to seek the new plan. The proposed semiconductor device using an InGaAs-based compound semiconductor, which has the n-i-p-i-n structure and employs an electrically bistable function of triangle barrier diode (TBD) type will be explained below. FIG. 1 shows a band diagram at zero bias of the proposed semiconductor memory which has the n-i-p-i-n structure. The numeral reference 501 denotes an n-InP layer, 502 an n-InGaALAs layer or n-InGaAsP layer (thickness: about 1-2 .mu.m), 503 an i-InGaAlAs layer or i-InGaAsP layer (thickness: about 1-2 .mu.m), 504 a p-InGaAlAs layer or p-InGaAsP layer (thickness: about 6 .mu.m), 505 an i-InGaAlAs layer or i-InGaAsP layer (thickness: about 50-200 nm) and 506 an n-InGaAlAs layer or n-InGaAsP layer (thickness: about 0.1-0.5 .mu.m), respectively. A broken line represents a Fermi energy level (E.sub.F). The n-InP layer corresponds to a drain region 3. The p-InGaAlAs layer (or p-InGaAsP layer) 504 corresponds to a gate region 2. The n-InGaAlAs layer (or n-InGaAsP layer) 506 corresponds to a source region 1.
FIG. 2 shows a band diagram in the case where a bias voltage V.sub.O is applied to the n-InP layer 501, and a positive gate voltage V.sub.G is applied to the p-InGaAlAs layer (or p-InGaAsP layer) 504. When the bias voltage is increased, an energy barrier height .DELTA. E.sub.C between the source region 1 and the gate region 2 decreases so that electrons (majority carriers) in the n-InGaAlAs layer (or n-InGaAsP layer) 506 serving as the source region 1 may surmount beyond the barrier, and cause a current flow I.sub.t. During this action, in the conventional n-i-p-i-n structure device, an "electron avalanche" is caused in the i-InGaAlAs layer (or i-InGaAsP layer) 503, and electrons which moved beyond the gate region 2 cause the electron avalanche to generate holes. The resultant holes move toward the gate region 2 and are stored therein, decreasing the potential in the gate region 2 and reducing the energy barrier height .DELTA. E.sub.C. As a result, further electrons may move beyond the barrier, causing a further electron avalanche to generate holes. Such a positive feedback may increase the current intensity and cause a negative resistance. The holes stored in the gate region 2 can move through it with a high speed toward the source region 1 because of a thin thickness of the gate region 2. FIG. 3 shows a current-gate voltage characteristic of the semiconductor memory having the n-i-p-i-n structure as shown in FIGS. 1 and 2. The bistable characteristic is obtained by increasing and decreasing the gate voltage. FIG. 4 is a timing chart showing a memory characteristic of the conventional semiconductor memory having the n-i-p-i-n structure. The memory characteristic appears in the current I.sub.t in accordance with set and reset pulses of the gate voltage V.sub.G.
As described above, the technical barrier now appears on the conventional semiconductor memory technologies. The necessity of extremely complicated processes for producing the conventional semiconductor memory trends to increase more and more. The more miniaturizing the device, the more increasing the difficulty in an accelerated manner. Further more, the conventional semiconductor memory such as the Si-DRAM has no function for writing information directly from with the optical input. In addition, although the triangle barrier diode (TBD) type electronic or optical device having the n-i-p-i-n or p-i-n-i-p structure has a writing function which uses the electrically bistable function, there is a problem that the stored content disappears after removing the power supply.